Design Verification Engineer (Remote Job)

Enterprise Logic Inc.

Hello All,

One of our client is looking for the following resource

Position: Design Verification Engineer (Remote Job)

Location: Boxborough, MA

Duration: 12 Months on W2 basis

Pay Rate: $85/hr on W2 - With No Benefits

Job Description :

Position can sit remotely anywhere in the U.S. Will need to travel to Markham, ON for a full week during the first few weeks of the assignment.

Description:

RESPONSIBILITIES :

• Work with global Front-End design team for large scale ASIC microprocessor and related
functions.
• Focus on digital design verification in simulation and hardware prototype platforms.
• Responsible for multiple aspects in design verification planning and execution.
• Accountable for project delivery.
• Reading Design Specifications and Converting the specs to Verification tests and plan

REQUIREMENTS :

• Familiar with Unix/Linux environment and good at scripts
• Understand the architecture of the chip and functional block being designed
• Build UVM, Verilog and/or C/C++ model for simulation
• Build testbenches, UVM UVCs for DUT with checkers and scoreboards.
• Compose test plan following design specs and validation vectors to ensure functional
completeness.
• Excellent knowledge with AMBA interfaces (i.e AXI, AHB)

Preferred Experience:

o Familiar with Linux Environment (including shell scripting, perl and linux gnu tools)

o Experience with design for verification (functional coverage, test plan)

o Should be versatile in any one of the high level verification flow such as SV, UVM / OVM etc as well as knowledge of industry standard tools for verification

o Should have excellent communication skills (both written and oral) o Strong problem solving skills

Interested candidates can share their resume at OR call me directly on

Thank you

  • provided by Dice Design* AND Verification AND ASIC AND (Unix OR Linux) AND UVM AND Verilog AND ("C" OR "C++")
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